SELF HEALING SYSTEM TO MITIGATE SINGLE EVENT UPSET IN SRAM BASED FPGA FOR SPACE APPLICATION

Abstract

Mission-critical digital systems are often implemented on Field Programmable Gate Arrays (FPGAs), which allow for easy Configuration of the hardware. FPGAs are especially desirable in these applications due to their cost-effectiveness for relatively small quantity productions and the ease with which they can be reused. The configurable nature of FPGAs presents one of its strongest advantages as well as one of its most significant limitations as compared to an Application Specific Integrated Circuit (ASIC), which is a fixed logic integrated circuit that is customized for a particular use. Non-permanent characteristic of FPGAs also causes problems with errors in the system, especially in environment subject to high radiation. Particles may cause portions of the configured circuitry to change states. FPGAs are therefore more prone to errors in its logic values and in its actual circuitry than a custom hardware solution such as an ASIC. Thus, here proof-ofconcept for the system that is capable of detecting such errors and partially self-reconfiguring these corrupted areas is illustrated. This “self-healing (Self Correcting)” system is capable of gracefully recovering from soft errors while maintaining valid system outputs. The SEU controller macro and reference design can emulate an SEU by deliberately injecting an error into the FPGA configuration so that its subsequent detection and correction can be confirmed and SEU Injection of errors can also be used to assess SEU mitigation circuits implemented in a design. We describe the operation and architecture of the proposed
logic design as well as its implementation in Xilinx virtex-5 FPGA.